CSIR – Central Electronics Engineering Research Institute (CEERI)

Total No. of Posts: 18

Name of the Area & Posts:
1. CPS-(PA -III/ SRF/ SPF): 12 Posts
2. CPS- (PA- II/ JPF/ JRF): 02 Posts
3. SS-(PA-III/II): 02 Posts
4. SS-(PA-II): 01 Post
5. MWD-(PA-II): 01 Post

Age Limit: Candidates age should be 35 years for post 1, 3, 30 years for post 2, 4, 5. Age relaxation is applicable for SC/ ST/ OBC candidates as per GOI instructions

Educational Qualification: Candidates should M.Tech/ ME (VLSI Design/ Microelectronics/ Embedded System/ CSE/ CE/ IT/ ECE/ EE/ EEE/ Software System/ S&S/ Electronics/ Instrumentation/ Instrumentation & Control System/ Power Electronics/ Electrical Engg/ Mechanical Engg/ Robotics/ Mechatronics) or equivalent for post-1, M.Tech/ ME (MEMS/ VLSI / Electronics/ Optoelectronics/ Photonics/ Material Science) or equivalent or B.Tech/ BE/ MSc (Electronics/ Physics) or equivalent + 02 years experience for PA-III, B.Tech/ BE/ MSc (Physics/ Electronics) or equivalent for PA-II for post-3, B.Tech/ BE (Electronics/ Electronics and Communications/ Electrical & Electronics/ Electronics & Instrumentation) or Msc (Electronics/ Physics) or equivalent for post-4 with minimum 55% marks. For more details refer the notification.

Selection Process: Candidates will be selected based on interview.

How to Apply: Eligible candidates can attend for walk in interview along with original documents of qualifications semester-wise/ year-wise, experience, date of birth and community certificate, if any (not older than 06 months in case of OBC) with one set of attested copies thereof on 16 & 17-01-2018 at 08:00 to 11:00 am.

Important Dates:
Date & Time of Interview for S.No-1 & 2: 16-01-2018 at 08:00 to 11:00 am
Date & Time of Interview for S.No-3 to 5: 17-01-2018 at 08:00 to 11:00 am
Registration Time: At 11:00 am
Venue: CSIR-CEERI, Pilani